The disclosed embodiments of the present invention relate to signal driving scheme, and more particularly, to a driver circuit used for signal transmission.
Traditional serializer/deserializer (SerDes) designs employ driver circuits including a current mode logic (CML) driver, a voltage mode driver, and an H-bridge current mode driver having a resistor coupled between a differential output terminals (referred to hereinafter as an H-bridge driver). However, the CML driver consumes more power. The voltage mode driver lacks design flexibility and is therefore unsuitable for transmitter (TX) equalizer design. Power efficiency of the H-bridge driver is higher than that of the CML driver but still lower than that of the voltage mode driver.
The application, U.S. application Ser. No. 14/280701, of the same applicant provides a driver circuit having low power consumption and high design flexibility, however, this driver circuit still have power loss at output terminals, and the driver circuit is not allowed to operate as a pulse-amplitude modulation-4 (PAM-4) driver and a non-return-to-zero (NRZ) driver that have different number of output voltage levels.